Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference 2019. With enormous support and global presence of audience from different segments of industrial lobby and academia made VSDOpen 2018 a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon.
- VSDOpen 2019, we are bringing you more interesting work done in RISC-V domain and Open Source EDA tools.
- Industry and Academic research talks about the chip designed and developed using RISC-V ISA from IIT Madras India and SweRV from Western Digital.
- First of its kind, Virtual Booth to Demonstrate the working RISC-V Chip and Board developed in complete Open source domain.
VSDOpen 2019 is free to attend! Anyhow, you must Register, so that we can plan better.
Date & Venue: LIVE ONLINE
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Distinguished Conference Keynote Speakers
Keynote Speakers Profile
Biodata: Dr. Andrew Kahng is world-renowned for his contributions to design automation methods for implementing complex integrated-circuit systems in semiconductors. He developed integrated-circuit physical design methods which maximise the system performance achieved using the most advanced semiconductor technologies. He also pioneered many foundations of Design for Manufacturability (DFM) methodologies for semiconductor products. Dr. Kahng for nearly two decades played a key role in the creation of the International Technology Roadmap for Semiconductors, setting out future directions for semiconductor and design technology research worldwide. Professor Kahng is the author of 3 books and 500+ journal and conference papers. He holds 34 issued U. S. patents. Professor Kahng co-founded and served as CTO of Blaze DFM Inc., an EDA software company that delivered new cost and yield optimisations at the IC design-manufacturing interface. The Blaze DFM core technology was responsible for substantial leakage power and total power reductions in such high-volume products as AMD/ATI Radeon graphics processor chips, and starting in ~2008 was embodied in the TSMC Power Trim Service that enabled low integrated-circuit power consumption and green products. Dr. Kahng is Principal Investigator of the OpenROAD project (theopenroadproject.org) within the IDEA Program of DARPA.
Biodata:Calista Redmond is the CEO of the RISC-V Foundation with a mission to expand and engage RISC-V stakeholders, compel industry adoption, and increase visibility and opportunity for RISC-V within and beyond the Foundation. Prior to the RISC-V Foundation, Calista held a variety of roles at IBM, including Vice President of IBM Z Ecosystem where she led strategic relationships across software vendors, system integrators, business partners, developer communities, and broader engagement across the industry. Focus areas included execution of commercialization strategies, technical and business support for partners, and matchmaker to opportunities across the IBM Z and LinuxOne community. Calista’s background includes building and leading strategic business models within IBM’s Systems Group through open source initiatives including OpenPOWER, OpenDaylight, and Open Mainframe Project. For OpenPOWER, Calista was a leader in drafting the strategy, cultivating the foundation of partners, and nurturing strategic relationships to grow the org from zero to 300+ members. While at IBM, she also drove numerous acquisition and divestiture missions, and several strategic alliances. Prior to IBM, she was an entrepreneur in four successful start-ups in the IT industry. Calista holds degrees from the University of Michigan and Northwestern University.
Biodata:Daniel has worked in Silicon Valley for the past 35 years with semiconductor manufacturers, electronic design automation software, and semiconductor intellectual property companies. Daniel Nenni is the founder of SemiWiki.com (an open forum for semiconductor professionals) and the co-author and publisher of “Fabless: The Transformation of the Semiconductor Industry”, “Mobile Unleashed: The Origin and Evolution of ARM Processors in our Devices”, “Prototypical: The Emergence of Prototyping for SoC Design”, “Custom SoCs for Iot: The Emergence of Custom Silicon for IoT Devices” and “SoC Emulation Bursting into its Prime”. Daniel is an internationally recognised business development professional for companies involved with the fabless semiconductor ecosystem.
Invited Talks by Industry and Academia Expertise
Invited Speaker Profile
Biodata:Dr.V.Kamakoti received the M.S. degree and the Ph.D. degree in computer science and engineering from IIT Madras, Chennai, India.,He is currently a Professor with the Department of Computer Science and Engineering and Associate Dean at ICSR,IIT Madras. He has more than 15 years of experience in computer systems development and specializes in the area of computer architecture, CAD for VLSI, and high performance computing. Dr. Kamakoti took SHAKTI processor initiative which aim to break the barrier between Academia and Industry by providing open-source Processor and SoC designs. He has authored a number of research papers that have been published in various international journals and in the PROCEEDINGS of many scientific conferences. Dr.Kamakoti also has interest in writing literature and has published Ganiporiyum Adipadiyum, a book in Tamil released in 1992. Dr.Kamakoti was research guide for 10 PhD students who have already graduated and 9 are ongoing. The paper entitled A Parallel Genetic Approach, using artificial neural networks, to temporal partitioning and synthesis for reconfigurable architectures won the Excellent Presentation Award at the Third Inter- national Symposium on Advanced Intelligent Systems (ISIS) held at Tsukuba, Japan, 2002. Dr.Kamakoti received DRDO Academic Excellence Award instituted by DRDO in recognition of the contribution from Academicians to various programs of DRDO. Recently, Dr.Kamakoti was awarded Techno Visionary Award, which is a lifetime achievement award given to an Indian academician, who made significant contributions to the field of Electronics and Semiconductor through research and development.
Biodata:Zvonimir Z. Bandić is the Research Staff Member and Senior Director of Next Generation Platform Technologies Department in a Western Digital Corporation in San Jose, California. He received his BS in electrical engineering in 1994 from the University of Belgrade, Yugoslavia, and his MS (1995) and PhD (1999) in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide
bandgap semiconductors. He is currently focusing on emerging Non-Volatile Memories (PCM, ReRAM,MRAM) applications for data center distributed computing, including RISC-V based CPU technologies,in-memory compute, RDMA networking, and machine learning hardware acceleration. He has been awarded over 50 patents in the fields of solid state electronics, solid state disk controller technology, security architecture and storage systems and has published over 50 peer-reviewed papers. Zvonimir is Chairman of CHIPS Alliance, Chair of OpenCAPI.org, and Board of Directors member of RISC-V standards organization.
Conference Chair
Call for Submission
Scope of Paper: We are accepting papers from authors around the world who have used open-source EDA tools to implement their RISC-V or similar designs. If you’ve designed, worked on or even just used open source IP cores and/or management systems, verification IP, build flows, SoCs, simulators, synthesis tools, FPGA and ASIC implementation tools under below mentioned topics.
- Front-end open-source EDA tool flows for IC design and verification
- Clock tree synthesis and optimization of digital IC for best Performance
- Floorplanning of digital IC for best area
- Place and Route of digital IC for best PPA
- RISC-V based SoC development using RISC-V software stack
Submission should be in PowerPoint presentation. The following are required for your submission:
- The title of the presentation
- Abstract of 100 words
- Category (a list will be provided)
- Topic Area (a list will be provided)
- Presenter(s) name, affiliation, city, state, country, and email address
- Upload 6 slides max PowerPoint presentation (extra note is optional but preferred)
The following guidelines should be followed when preparing your slides for submission:
- Submissions are limited to 6 total slides*.
- Submissions must be in PowerPoint format: 16:9 aspect ratio.
- Slide 1: Title, author names and affiliations
- Authors may NOT be added after acceptance, so be sure to list all authors in the initial submission.
- Slide 2: Symposium Topic
- Include an introduction that specifies the context and topic of the submission.
- Slide 3: Main Idea
- Include details on the specific contributions of your work. Examples: innovative use of open source tools to achieve a specific goal, user enhancements to the tool and/or tool flow.
- Slide 4: Additional Content Slide
- Flexibility to add a slide that demonstrates value of the paper/idea
- Slide 5: Evidence
- Slide 6: Summary
- Include a summary that highlights the main results of your work. Results are needed to evaluate the impact of your contribution. Metrics that could be used include productivity enhancement, improved quality of silicon, decreased complexity, and reduced time-to-market.
- Slide 1: Title, author names and affiliations
*Important: Ensure that you have the content and data obtained using Open source domain and tools to submit your presentation.
Submission Opens – June 1, 2019
Submission Deadline – August 15, 2019
Accept/Reject Notification – September 15, 2019
Camera Ready Presentation – October 10, 2019
VSDOpen 2019 is free to attend! Anyhow, you must register, so that we can plan better.
LIVE Open Source HW Demo Booth
VSDOpen 2018 Reviews & Feedback
“Good conference but if we get the recording or ppt which presented it would be very helpful.”
“Fantastic..!!”
“Hello VSD team!It was really a great experience getting to know about open source hardware and tl verilog. Also got an opportunity to meet some great and amazing people in the industry . I attended this conference from Oman. I had to wake up at 6am . But I don’t regret it at all now. Apart from occasional disturbances the audio and video clarity was all good. Kudos to Kunal and Anagha and all the VSD team! They executed it perfectly. Eagerly waiting for more conferences like this in future.”
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