Blogs – Page 20 – VLSI System Design

meet our technology partners

Hi Glad to have a prestigious institution (University of Illinois) and a market leader in Library characterization/modelling (Paripath) as our technology partners. For more, read […]

VIVO – A Popular CCS noise model to find delay change

Its static though, but really efficient….. I am referring to voltage-in-voltage-out VIVO model which is nothing but a current table as a function of input […]

About me….

Never really found a chance to properly introduce myself and my background to all of you. So here it is… My name is Kunal Ghosh […]

Worried about liberty basics? Let’s start from ground zero!!

a group of arcs form ‘pin’, a group of ‘pins’ form a cell, and a group of ‘cells’ for a library.“voltage_unit” is form of library attribute, “area” is a form of cell attribute, “direction” and “function” are forms of pin attribute

I am hidden, but I exist-Dynamic power dissipation in CMOS

Meet me, I am “hidden power” Dynamic power dissipation in CMOS When we are asked about dynamic power dissipation, below 2 things just appear at […]

VLSI interviews or deep concepts – This one covers it all…

Its a glimpse of physical design flow, static timing analysis, static circuit simulation, dynamic circuit simulations, leakage & switching power concepts, crosstalk glitch & delta delay concepts and basic delay of a cell.