Propagated noise – Let’s clear this once and for all.
Hi “All that glitters is not gold”…. Similarly, “All that bumps is not noise”…. This is what needs to be nailed forever While doing my […]
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Want to protect your transistor? Meet TIE-HI cell
With its very few connections and a relatively simple circuit, tie-hi cell is found to be one of the most important place in IC design, […]
Are you analyzing noise? Then meet me, I am CCC
A channel connected component (CCC). For some reasons, I feel my friends in CAD company or my leads are not able to introduce me very […]
A great day at STA workshop & my two cents on freshers and recruiters
“You will never know your limits unless you push yourself to them” That was the exact atmosphere of entire room in which I conducted STA […]
First ever STA workshop using open-source tools in Bangalore!!
And a great chance to meet you all in person……!! This is exciting…I mean, for years, I have been connected you ‘online’. And now I […]
Memory, tristate and library characterization – how are all connected?
Hi I am happy to say, they really are connected….Let’s figure out how? If you see a classic application of tri-state buffer, it’s the memory […]
Euler’s path, euler’s circuit, pull-up, pull-down, vlsi layout – Are all connected? – Part1
Yes….they are….Find out more about it in my custom Layout course: While you still decide to take my layout course or not, I would like […]
Hey, its time you take charge of your design!!
….And this is something which I can show you using the newly launched open-source EDA tool “eSim (FOSSEE IITB Project)”. Let’s assume for a moment, […]
eSim Tool – From 2015 Vision to 2017 Reality
If you had been following me on linkedin or Udemy, you would have had received an announcement from me in the year 2015, where I […]
Let’s talk about currents – Punch through effect..
And it’s important, as this will set a back-ground for my upcoming new course on “CCS Timing Libraries”. So, in my last blog, we talked […]
