5th mile-stone in field of open-source – another compact SRAM
This time its @Reuel did a pretty great job of building a pretty compact 6T-SRAM cell and he is just a third year engineering student
Category Archives: Concepts
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4th mile-stone – 35 RISC-V cores in 5-days – Can you believe it?
We had Makerchip IDE, TL-Verilog, Day wise Slack channels, Classroom GitHub and VSD-IAT – All of them so seamlessly integrated that every participant followed the loop and there you go. Out of 110 participants, 35 participants built entire basic RISC-V CPU core which is close to 30% participants, and all in 5-days
3rd mile-stone in 1-week in field of open-source – 4kB SRAM design
@Yash joined our research project group under VSD Research internship program which runs for 8-weeks. He was supposed to explore openRAM memory compiler flow, develop all custom cells required by openRAM using OSU180nm and generate 4kB SRAM with an access time of 2.5ns
VSD is now “Intelligent VSD”
After 9-years of extensive research on VLSI students learning patterns and multiple 5-days workshop with students and professionals all over world, below image displays 6 critical components of a remarkably successful VSD workshop. I am measuring success in terms of placements, interviews, fundamentals revision and job changes by professionals.
Opensource IP Bank – That is OUR internship program
Finally, it is out – VSD has its own internship program with loads of fun learning and career growth. The day, like 4 years back, when we had sketched below idea, now seems to be a reality.
The heart is missing….
NPTEL presents you this fantastic opportunity to interact with Industry Expert Mr. Kunal P Ghosh, Director, and co-founder of VLSI System Design (VSD) Corp. Pvt. Ltd. on 07th March 2020 at 6 PM over a live session on topic – Transforming the Silicon Industry Through Open-Source.
VSD comes to MUMBAI on 19th February !!
As per huge request from students and working professionals from all over places, VSD is conducting another “VLSI SoC design workshop using open-source EDA tools” from 19th-23rd February, which has only 1-working day, and rest all are holidays. Below link has detailshttps://www.vlsisystemdesign.com/upcoming-event/
VSDOpen2019 Invited Talks by Open Source Tool Developers
Talk by Puneet Goel on ” Embedded UVM – Enabling Multicore Test benches”
VSOpen 2019 Demo 3: BOOM: The Berkeley Out-of-Order Machine by Berkeley University
VSOpen 2019 Demo 3: BOOM: The Berkeley Out-of-Order Machine by Berkeley University. Superscalar RISC-V OoO core
Fully integrated in Rocket Chip ecosystem, ~18K LoC of open-source Chisel, Parameterizable generator
VSDOpen 2019 Demo 1 : Raven Chip – First-time silicon success with Qflow and Efabless
The Raven chip: First-time silicon success with Qflow and Efabless Raven is a open-source top-level SoC design based […]
