Description:

This basic overview of Phase-Locked Loop IC design on Open-Source Google-Skywater 130nm node, takes an intuitive approach to designing a simple PLL with extraordinarily little math and without diving into complex frequency domain analysis or control system theory. The tools that will be used are Ngspice and Magic. These tools will be briefly covered, and no prior knowledge of these tools is required to take this course. Starting with basic PLL concepts, this overview spans all the steps in the IC design flow - circuit design, simulation, layout, parasitics extraction, post layout simulation and finally, it also briefly includes the use of the latest caravel harness to make tapeouts - all in just 100mins to save your time! The basics needed to start your exploration into PLLs is covered. An undergraduate-level understanding of electronic circuits and VLSI, is a prerequisite.

Day 1 – PLL Theory and Lab setup

1. Introduction to PLL
2. Introduction to Phase Frequency Detector
3. Introduction to Charge Pump
4. Introduction to VCO and Frequency Divider
5. Tool setup and design flow
6. Introduction to PDK, specifications and pre-layout circuits
7. Circuit design simulation tool - Ngspice Setup
8. Layout design tool - Magic Setup

Day 2 – PLL Labs and post-layout simulations

1. PLL components circuit design
2. PLL components circuit simulations
3. Steps to combine PLL sub-circuits and PLL full design simulation
4. Troubleshooting steps
5. Layout design
6. Layout Walkthrough
7. Parasitics extraction
8. Post Layout simulations
9. Steps to combine layouts
10. Tapeout theory
11. Tapeout labs

1. Virtual Coach platform with expert instructor guidance
2. Cloud-based dedicated Virtual Machine to perform Design labs
3. Intelligent Assessment Technology (IAT) and Project allocation
4. 24 hours Lab access for 5 days and Instructor assistance on demand
5. Run EDA scripts, evaluate VLSI layout and Timing analysis reports on platform

1. ngSpice,
2. Magic,
3. Google/Skywater 130nm pdks

Kunal Ghosh, co-founder of VLSI System Design (VSD) Corp. Pvt. Ltd., Kunal pioneers in the field of online open-source EDA (qflow & openroad)/open-source hardware (specially RISC-V) design and learning. Currently, Kunal owns around 32 high-quality VLSI online courses in and around open-source EDA/hardware, which is being consumed by around 28700+ students around 141 countries. Apart from trainings, Kunal has also worked with IIT Madras and IIT Guwahati on open-source activities and design projects. Currently, Kunal and his team are working on developing high quality open-source Analog/Digital IP’s which would be first one’s in the field of open-source hardware design. Prior to VSD, Kunal has worked with Qualcomm and Cadence, in field of SoC design. Kunal has done his Masters at IIT Bombay in field of VLSI & Nano-electronics, with specialisation in Sub-100nm Electron Beam LithographyOptimisation techniques.

Lakshmi Sathidevi is a Hardware Design and Artificial Intelligence Student, and pursuing Master's in Electrical and Computer Engineering at the Georgia Institute of Technology. She is keenly interested in open-source and the windows of opportunity that it could bring to IC design and hardware development.

In her words "I am humbled to have been able to take part and submit my own fully open-source design - a PLL clock multiplier, in the first-ever Google-Skywater MPW tapeout shuttle. I took to Master's to expand my scope of learning in open-source IC Design and development of intelligent systems. Some projects I have worked on include, MRI reconstruction using DL techniques, Digital Logic Simulator, evaluation of the NVIDIA DREAM Camera-to-Robot DL pose-estimation with Data Synthesis using Domain Randomization and evaluation of the Intel Movidius VPU for real-time DL inference tasks."

Refund Policy: Last date to apply for refund is 29 July 2021 11:59 PM IST.

Refund Policy: If you are not able to join workshop, Last date to apply for refund is 16 September 2021 11:59 PM IST.

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