The training, the internship and finally, the tape-out – VSD Silicon proven model
A dream and a mission statement that was framed 10 years back by VSD and efabless (or let us say, e-fabulous) has now taken a […]
Tag Archives: eFabless
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6th mile-stone in field of open-source – FREE VLSI tool installation course
A full-fledged video lectures on step-by-step process to install OpenLANE EDA tool chain and Sky130 PDK open-process on your own laptop, from scratch. There is a dependency on vsdflow, though for fresh users and with Windows or fresh Unix machines. To do something like this, it needs a clear focus on end vision, with very good VLSI fundamentals, which demands hours of efforts every day
2nd mile-stone in field open-source (open-lane EDA + Google/Sky130)
@Nickson joined our research project group under VSD Research internship program which runs for 8-weeks. He was supposed to develop flow for standard cell design and characterization using all open-source tools – magic/ngspice, then plug those standard cells into open-source PNR flow by open-lane, and benchmark RTL2GDS flow results. This needed a knowledge, not only of PNR, but device physics, custom layout, DRC/LVS and then (finally) Physical design/STA.
Mixed-signal PNR flow using openlane/sky130nm process
GitHub is the new Resume for VLSI industry
VSDOpen 2019 Demo 1 : Raven Chip – First-time silicon success with Qflow and Efabless
The Raven chip: First-time silicon success with Qflow and Efabless Raven is a open-source top-level SoC design based […]
MAGIC Layout FAQ – psubstratecontact and nsubstratecontact
Hey There, Now that it’s clear, that we can tapeout using open-source EDA tools (referring to recent RavenSoC tapeout by Efabless Corp. Pvt. Ltd. using […]
History etched with VSDOpen2018 – First VLSI online conference….
Hi “Pictures speak it all” Finally, we all did it – VSDOpen – first ever online VLSI conference. Very close to a real one – […]
VSDOpen 2018 Keynote 3: Applying Open community Innovation to hardware Product creation
Mohamed Kassem is the CTO and Co-Founder of efabless.com, the first semiconductor company applying open community innovation to all aspects of product development. Prior to launching efablesshe […]
eFabless is back…with synth/PD/DRC/LVS…and a working CHIP
A working chip is all using opensource EDA tools (no more license fee). Of course, its taped-out in 180nm technology. But who knows, this might be just the beginning. Upcoming blogs will talk more about the commercial angle of this. Let’s see how it is going to benefit student/professionals/innovators community
Characterize Level-shifter – It can’t get simpler than this
Well, that’s was just a demo of the powerful efabless platform. Do you want to know more about this powerful yet simple platform? Do you want to build complete SoC using this platform? We did an entire webinar on this, and here’s the copy of it.
