Paper 1: Padframe Generator for Qflow
An opensource padframe generator was developed on the efabless platform for usage with the Open-Source Qflow Digital Synthesis Flow, for digital logic chips in the X-FAB XH018, 180nm process.
An opensource padframe generator was developed on the efabless platform for usage with the Open-Source Qflow Digital Synthesis Flow, for digital logic chips in the X-FAB XH018, 180nm process.
Webinar presents a hands-on approach with session on GPUs, solving design automation problems with modern machine intelligence techniques by including step-by-step development of commercial grade applications including resistance estimation, capacitance estimation, cell classification and others using dataset extracted from designs at 20nm.