VSD IP Specs

Registration for Ethical RISC-V IoT Workshop

Welcome to Ethical RISC-V IoT Workshop

The “Ethical RISC-V IoT Workshop” at IIIT Bangalore, organized in collaboration with VSD, is a structured, educational competition aimed at exploring real-world challenges in IoT and embedded systems. Participants progress through three stages: building an application, injecting and managing faults, and enhancing application security. The event spans from May 9 to June 15, 2024, culminating in a showcase of top innovations and an award ceremony. This hands-on hackathon emphasizes learning, testing, and securing applications in a collaborative and competitive environment.

Rules :

Only for Indian Student whose college is registered under VTU
Only team of 2 members can Register
Use only VSDSquadron Mini resources for product development

Awards :

Prize money for final 10 Team
3 Winner team’s Product will be evaluated for Incubation
7 consolation prizes
Completion Certificate to final round qualifier
Chance to build a Proud Secured RISC-V Platform for India

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

VSDSquadron, a cutting-edge development board based on the RISC-V architecture that is fully open-source. This board presents an exceptional opportunity for individuals to learn about RISC-V and VLSI chip design utilizing only open-source tools, starting from the RTL and extending all the way to the GDSII. The possibilities for learning and advancement with this technology are limitless.

Furthermore, the RISC-V chips on these boards should be open for VLSI chip design learning, allowing you to explore PNR, standard cells, and layout design. And guess what? vsdsquadron is the perfect solution for all your needs! With its comprehensive documentation and scalable labs, thousands of students can learn and grow together.

VSD HDP (Hardware Design Program) Duration-10 Week

With VSD Hardware Design Program (VSD-HDP), you have the opportunity to push the boundaries of what exist in open source and establish the new benchmark for tomorrow.

It will leverage your degree in Electrical or Computer Engineering to work with

Programmable logic
Analog/ digital IP
RISC-V
Architecture & microprocessors
ASICs and SoCs on high-density digital or RF circuit cards
Gain hands-on knowledge during design validation and system integration.

Sounds exciting to just get started with expert mentors, doesn’t it? But we are looking for the next generation of learners, inventors, rebels, risk takers, and pioneers.

“Spend your summer working in the future !!”

Outcomes of VSD Online Research IP Design Internship Program

Job opportunities in Semiconductor Industry
Research work can be submitted to VLSI International journals
Participate in Semiconductor International Conference with Internship Research Work
Paper Publications in IEEE Conference and SIG groups
Tape out opportunity and IP Royalty
Interact with world class Semiconductor designer and researchers
Academic professions where more research projects are encouraged.
All the above research and publication work will help colleges and institutes to improve accreditation levels.

Know More Information

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD Intern Webinars

VSD is working towards creating innovative talent pool who are ready to develop design and products for the new tech world. VSD believes in “Learning by doing principle” , and always prepare the student to apply the knowledge learned in the workshops, webinars and courses. We always push our students to work on new designs, test it and work continuously till it becomes the best performing design. Any student who enrolls to VSD community starts working with small design and grows with us and develops a tapeout level design with complete honesty and dedication towards the Work !!

Check out VSD Interns Achievement!

VSDOpen Online Conference

Welcome to the World’s only online conference in Semiconductor Industry VSDOpen Conference. With enormous support and global presence of audience from different segments of industrial lobby and academia made a highly successful event. Evolution is change in the genetic makeup of a population over time, online conference is one kind evaluation everyone adapt soon.

VSDOpen 2022 is an online conference to share open-source research with the community and promote hardware design mostly done by the student community.
VSDOpen 2022 is based on the theme “How to lower the cost to learn, build, and tapeout chips ?” , which will provide a platform to community to build stronger designs and strengthen the future of Chip design.
VSDOpen is envisioned to create a community based revolution in semiconductor hardware technology.
The open source attitude is required to bring out the talent and innovation from the community who are in remote part of world and have least access to the technologies. And now Google support will help to bring the vision to execution by VSD team.

VSD Online Course by Kunal Ghosh

VSD offers online course in complete spectrum of vlsi backend flow from RTL design, synthesis and Verification, SoC planning and design, Sign-off analysis, IP Design, CAD/EDA automation and basic UNIX/IT, Introduction to latest technology – RISC-V, Machine intelligence in EDA/CAD, VLSI Interview FAQ’s.

Current Reach – As of 2021, VSD and its partners have released 41 online VLSI courses and was successfully able to teach ~35900 Unique students around 151 countries in 47 different languages, through its unique info-graphical and technology mediated learning methods.

"Join Chip Design for High School (Grade 6-12)"

Analog & Mixed Signal IP

ADC (avsdadc_3v3)

DAC (avsddac_3v3)

Bandgap (avsdbgp_3v3)

On-chip PLL (avsdpll_3v3) Clock multiplier (pll) (Fclkin – 5MHz to 12Mhz, Fclkout – 40MHz to 100MHz at 1.8v

Crystal oscillator analog pad (avsdxtosc_3v3)

Comparator (avsdcmp_3v3)

Memory & I/O Library

vsdbbcud4f

SRAM 4 kb or 32 bits

Tools and Design Flow

Circuit to Layout

Power Analysis Methodology

VSDFLOW (VLSI System Design Flow)

Registration for Ethical RISC-V IoT Workshop

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

VSD HDP (Hardware Design Program) Duration-10 Week

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD Intern Webinars

VSD Interns made it happen !!

VSDOpen Online Conference

VSD Online Course by Kunal Ghosh

Enquiry Form

"Join Chip Design for High School (Grade 6-12)"

VSD IP Specs

Analog & Mixed Signal IP

ADC (avsdadc_3v3)

DAC (avsddac_3v3)

Bandgap (avsdbgp_3v3)

On-chip PLL (avsdpll_3v3) Clock multiplier (pll) (Fclkin – 5MHz to 12Mhz, Fclkout – 40MHz to 100MHz at 1.8v

Crystal oscillator analog pad (avsdxtosc_3v3)

Comparator (avsdcmp_3v3)

Memory & I/O Library

vsdbbcud4f

SRAM 4 kb or 32 bits

Tools and Design Flow

Circuit to Layout

Power Analysis Methodology

VSDFLOW (VLSI System Design Flow)

Registration for Ethical RISC-V IoT Workshop

Date for Registration : 9th May - 22nd May, 2024 Hackathon Inauguration : 23rd May 2024

VSDSquadron (Educational Board)

VSD HDP (Hardware Design Program) Duration-10 Week

VSD – Intelligent Assessment Technology (VSD-IAT)

VSD Intern Webinars

VSD Interns made it happen !!

VSDOpen Online Conference

VSD Online Course by Kunal Ghosh

Enquiry Form

Date for Registration : 9th May - 22nd May, 2024
Hackathon Inauguration : 23rd May 2024