VLSI System Design
Kunal P. Ghosh, M.Tech (VLSI & Nanoelectronics), IIT Bombay
Vijayamanohar. N, M.Tech (Electronics Design and Technology), IISc Bangalore
Home
Physical Design Forum
About Us
Share thoughts and comments
INDUSTRIAL PHYSICAL
DESIGN FLOW
NEW TOPIC
UPCOMING TOPICS
I-V characteristics of NMOS & PMOS transistors
The Contents of this page is under review
Back to switching activity of CMOS
Back to Concept of Decoupling Capacitors
Back to Introduction to Industrial Physical Design Flow
Comments:
Save
DID YOU KNOW ??
What is the impact of coupling capacitance on functionality and delay??
What is Crosstalk Noise??
What is the impact of scaling on Resistance, Capacitance and RC delay??
What is Industrial Physical Design Flow??
How a chip is designed from RTL program??
What is the switching characteristics of CMOS??
What is basic RC model of CMOS??
Why are de-coupling capacitors placed around critical cells??
What is Noise Margin??
What is combinational logic??
What is Finite State Machine??
What is Static Timing Analysis??
What is Engineering Change Order??
What is propagation delay of a logic cell??
How the delay of the cell could be modified??
What is the I-V characteristics of NMOS/PMOS??
Copyright © 2012 - www.vlsisystemdesign.com All Rights Reserved
Comments: